coursework / completed
FPGA Digital Systems
A collection of Verilog designs progressing from combinational logic to pipelined arithmetic systems and FPGA validation.
Overview
This collection documents a progression through digital design: combinational circuits, sequential systems, finite-state machines, arithmetic structures, and FPGA implementation.
Technical
Representative work includes structural arithmetic circuits and an 8-by-8 Wallace-tree multiplier. Each design was developed with a testbench, verified in simulation, and exercised on FPGA hardware where appropriate.
Tools
Verilog, Xilinx Vivado, RTL simulation, testbench development, FPGA synthesis, and timing-oriented debugging.